In small geometry integrated circuit process technology, such as 0.5 micron or below, one of the problems is that the etching of a hole causes the hole that is etched to be larger than the mask dimension for a positive photoresist process. In the case of forming a polysilicon line, the photoresist is developed away to leave a line of photoresist of a line width which is somewhat less than the pattern on the mask which defined the photoresist line. The photoresist that remains is what determines the ultimate polysilicon width. In this case, the polysilicon that remains after etching the polysilicon layer using this photoresist as a mask is about 0.5 micron. The result is a polysilicon minimum dimension of 0.5 micron for a 0.5 micron technology. In the case of forming a contact, the hole that is to be made for the contact is derived from a pattern on a mask which is at about 0.55 micron for a 0.5 micron technology. This results in an exposure on the photoresist of about 0.60 micron. The photoresist, however, when developed, leaves a hole of about 0.65 micron so that the effect of the exposure of a 0.55 micron pattern on the mask is to leave a hole in the photoresist of 0.65 micron. The photoresist acts as a mask for the underlying oxide which, when etched by a mask with a hole of 0.65 micron, results in a hole of about 0.75 micron due to the activity of the etch material itself. Even though the etch may be a reactive ion etch (RIE), the walls of the oxide are expanded about another tenth of a micron. Thus, the contact hole is 0.25 microns wider than the minimum polysilicon width that is obtained.
In aligning the contact to a heavily-doped region in the substrate, however, there is a much wider area that must be allotted for the contact alignment than is actually necessary to obtain a good electrical contact. The width of the contact does reduce the resistivity of the contact, but the resistivity of the contact material itself is so low in relation to the other resistances in the path that any extra resistance due reducing the contact size is of no consequence. A much smaller diameter contact would work equally well electrically. The large contact hole may mean that the diffused areas in the substrate to which the contact is made have to be larger than they would have to be otherwise. It means that other circuit elements have to be further removed from contact holes than they would have to be otherwise. All of which cause the integrated circuit to be less dense, the overall integrated circuit larger, and thus decreases the number of potential die on a particular wafer and in some cases making the die too large to fit into some industry standard package. The desirability of smaller die size is well known and there are numerous reasons for it.